System-on-Chip Platforms

Vortragende/r (Mitwirkende/r)
Umfang3 SWS
SemesterSommersemester 2019
Stellung in StudienplänenSiehe TUMonline


Teilnahmekriterien & Anmeldung

Siehe TUMonlineRegistration at TUMonline starting on 15th March 2019


At the end of the module students are able to analyze and evaluate the creation of System-on-Chip Platforms built on underlying SoC Technologies. This includes design flows, as well as analyzing and dimensioning examples for crucial IC system parameters in a wide range of SoC products.


System-on-Chip Platforms (SoCP) extends the understanding of SoC technologies and design by investigating the architectural composition of multiple real-world case studies taken from existing SoC products in the networking, signal processing and graphics processing application domains (SONET/SDH transmission framers in wide are networks (WAN), LAN/SAN (Local area / System area network) switches, network and GPU/GPGPU graphics processors. Subject are also architecture extensions of today’s processors, like out-of-order execution, multi-threading and the basics of protocols for the interaction of software and hardware in embedded systems. In the case studies, application-specific requirements for processing performance, memory size, access speed and bandwidth, control circuit clock rates, silicon area, power consumption and packaging are analyzed.

Inhaltliche Voraussetzungen

Basic skills in digital IC design are a necessary prerequisite for SoC Platforms, SoC Technologies is recommended. This includes knowledge on building blocks of integrated circuits, designing finite state machines (FSMs), memory technologies, and on IC design platforms (FPGA, ASIC, SoC).

Lehr- und Lernmethoden

Teaching method: Lecture material is accompanied by corresponding tutorials. Students are expected to study provided reference literature on investigated SoC platforms and additional excercises in home assignments. Reference literature and home assignment excercises are also subject of examination.

Studien-, Prüfungsleistung

Written final examination makes up 100 % of the grade.

Empfohlene Literatur

- J. Hennessy ""Comp. Architecture-A Quantit.Approach"" - J. Rabaey, ""Digital Integrated Circuits"", Prentice Hall - A. Tannenbaum, ""Computer Networks"", …


Further Lecture Material

Network Processor Video Tutorial