Sven Rheindt, M.Sc.

Wissenschaftlicher Mitarbeiter  

Technische Universität München
Fakultät für Elektrotechnik und Informationstechnik
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80290 München

Tel.: +
Fax: +
Gebäude: N1 (Theresienstr. 90)
Raum: N2140


Vergebene Arbeiten


Near Memory Acceleration

Near Memory Acceleration

The goal of this seminar is to provide a survey of near memory acceleration and accelerators.


Hitting a wall is not a pleasant thing. Computer systems faced many walls in the last decades.Being able to break the memory wall in the mid 90's and the power wall in 2004, it now faces the next crucial barrier for scalabilty. Although being able to scale systems to 100's or 1000's of cores through NoCs, performance doesn't scale due to data-to-task dislocality. We now face the locality wall.

The newest trend to tackle this issue is data-task migration and processing in or near memory.

The goal of this seminar is to provide a survey of near memory acceleration and accelerators. Useful functions and architectures should be investigated.



Sven Rheindt

Betreute Arbeiten

  • Address Translation Unit - enabling a global address space for invasive computing
    (Bachelor Thesis, Emin Saidi, 2017)
  • Address Map Protection on a Tiled Multi-Processor Platform
    (Forschungspraxis, Alexander Gembarzhevskiy, 2016)
  • Design and Implementation of a Compare-and-Swap (CAS) Instruction over a Network on Chip (NoC)
    (Forschungspraxis, Andreas Schenk, 2016)


  • Sven Rheindt, Andreas Schenk, Akshay Srivatsa, Thomas Wild and Andreas Herkersdorf: CaCAO: Complex and Compositional Atomic Operations for NoC-based Manycore Platforms. ARCS 2018 - 31st International Conference on Architecture of Computing Systems, 2018 mehr… BibTeX
  • Akshay Srivatsa, Sven Rheindt, Thomas Wild, Andreas Herkersdorf: Region Based Cache Coherence for Tiled MPSoCs. 2017 30th IEEE International System-on-Chip Conference (SOCC), 2017 mehr… BibTeX