Dipl.-Ing. Michael Vonbun

Wissenschaftlicher Mitarbeiter

Technische Universität München
Fakultät für Elektrotechnik und Informationstechnik
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80290 München

Tel.: +49.89.289.23859
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2139
Email: michael.vonbun@tum.de

Curriculum Vitae

  • 2010, Dipl.-Ing., Electrical Engineering and Information Technology, Technische Universität München

Angebotene Arbeiten

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Titel
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An Introduction to Finite Length Codes for SoCs

An Introduction to Finite Length Codes for SoCs

Beschreibung

High data integrity is a key in modern SoC communication. However, due to the ever decreasing feature size, modern silicon devices become more vulnerable to transient faults. At the same time, on-Chip communication operates on rather small chunks of data, in contrast to traditional unreliable communication scenarios like wireless communication. Therefore, conventional measures like the channel capacity as introduced by Shannon do hold anymore, paving the way to new methods to quantify channels and codes alike that take the code length into account. The goal of this seminar is to provide an introduction into the field and methods of finite length codes.

Betreuer:

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Meltdown: Concept, Cause and Effect

Meltdown: Concept, Cause and Effect

Beschreibung

When at the beginning of 2018 researchers published their discovery of side-channel attacks Meltdown and Spectre on modern CPUs, an entire industry was forced to rethink state-of-the-art techniques used to increase the processing power of their designs. In the seminar the core concepts of modern processors, their exploits leading to Meltdown, as well as mitigation techniques shall be presented.

Betreuer:

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Meltdown: Concept, Cause and Effect

Meltdown: Concept, Cause and Effect

Beschreibung

When at the beginning of 2018 researchers published their discovery of side-channel attacks Meltdown and Spectre on modern CPUs, an entire industry was forced to rethink state-of-the-art techniques used to increase the processing power of their designs. In the seminar the core concepts of modern processors, their exploits leading to Meltdown, as well as mitigation techniques shall be presented.

Betreuer:

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An Introduction to Finite Length Codes for SoCs

An Introduction to Finite Length Codes for SoCs

Beschreibung

High data integrity is a key in modern SoC communication. However, due to the ever decreasing feature size, modern silicon devices become more vulnerable to transient faults. At the same time, on-Chip communication operates on rather small chunks of data, in contrast to traditional unreliable communication scenarios like wireless communication. Therefore, conventional measures like the channel capacity as introduced by Shannon do hold anymore, paving the way to new methods to quantify channels and codes alike that take the code length into account. The goal of this seminar is to provide an introduction into the field and methods of finite length codes.

Betreuer:

Laufende Arbeiten

Forschung

  • Kommunikationstechnik mit Schwerpunkt Mehrantennensystemen
  • Aspekte der hardwarenahen Signalverabeitung
  • Einfluß moderner nachrichtentechnischer Konzepte und Methoden auf On-Chip Kommunikation

Publikationen

  • Michael Vonbun, Thomas Wild, Andreas Herkersdorf: Estimation of End-to-End Packet Error Rates for NoC Multicasts. Architecture of Computing Systems -- ARCS 2016, Springer International Publishing, 201629th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings mehr… BibTeX Volltext ( DOI )
  • Michael Vonbun, Stefan Wallentowitz, Andreas Oeldemann, Andreas Herkersdorf: An Analytic Approach on End-to-end Packet Error Rate Estimation for Network-on-Chip. Euromicro Conference on Digital System Design (DSD), 2015 mehr… BibTeX
  • Michael Feilen, Andreas Iliopoulos, Michael Vonbun, Walter Stechele: Weighted Partitioning of Sequential Processing Chains for Dynamically Reconfigurable FPGAs. 23rd International Conference on Field Programmable Logic and Applications (FPL), 2013 mehr… BibTeX
  • Michael Vonbun, Stefan Wallentowitz, Michael Feilen, Walter Stechele, Andreas Herkersdorf: Evaluation of Hop Count Advantages of Network-Coded 2D-Mesh NoCs. Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013 mehr… BibTeX