Dr.-Ing. Thomas Wild

Akad. Oberrat 

Technische Universität München
Fakultät für Elektrotechnik und Informationstechnik
Lehrstuhl für Integrierte Systeme
Arcisstr. 21
80290 München

Tel.: +49.89.289.23867
Fax: +49.89.289.28323
Gebäude: N1 (Theresienstr. 90)
Raum: N2136
Email: thomas.wild@tum.de

Lehre

Forschung

  • Manycore system on chip (SoC) architectures
  • Network processor (NPU) architectures
  • On-chip communication architectures, networks on chip (NoC)
  • System level design methodologies
  • Design space exploration

Other Responsibilities

I am also EUROPRACTICE representative of TU München (city campus). EUROPRACTICE is a European initiative to stimulate the wider exploitation of state-of-the-art microelectronics technologies. Via the EUROPRACTICE software service, commercial EDA tools are made available for teaching and research at a university-compatible price. More information can be found here.

Prospective participants from the TU München city campus should get into contact with me. (Please note, the TUM Garching campus has a separate EUROPRACTICE membership, which is administered at the Physics Department.)

Publikationen

2017

  • Akshay Srivatsa, Sven Rheindt, Thomas Wild, Andreas Herkersdorf: Region Based Cache Coherence for Tiled MPSoCs. 2017 30th IEEE International System-on-Chip Conference (SOCC), 2017 mehr… BibTeX
  • Andreas Oeldemann, Thomas Wild, Andreas Herkersdorf: Reducing Data Center Resource Over-Provisioning Through Dynamic Load Management for Virtualized Network Functions. International Conference on Architecture of Computing Systems, 2017 mehr… BibTeX Volltext ( DOI )
  • Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jan Heisswolf, Jürgen Becker, Andreas Weichslgartner, Jürgen Teich: Efficient Task Spawning for Shared Memory and Message Passing in Many-core Architectures. Journal of Systems Architecture, 2017 mehr… BibTeX Volltext ( DOI )
  • Ihsen Alouani, Thomas Wild, Andreas Herkersdorf, Smail Niar: Adaptive Reliability for Fault Tolerant Multicore Systems. Euromicro Conference on Digital System Design (DSD) 2017 , 2017 mehr… BibTeX Volltext ( DOI )
  • Lin Li, Philipp Wagner, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf: A Non-Intrusive Spinlock Profiler for Embedded Multicore Systems. DATE, 2017 mehr… BibTeX
  • Philipp Wagner, Thomas Wild, Andreas Herkersdorf: DiaSys: Improving SoC insight through on-chip diagnosis. Journal of Systems Architecture, 2017 mehr… BibTeX Volltext ( DOI )

2016

  • Andre Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf: Resolving Performance Interference in SR-IOV Setups with PCIe Quality-of-Service Extensions. 2016 Euromicro Conference on Digital System Design (DSD), 2016 mehr… BibTeX
  • Lin Li, Philipp Wagner, Ramesh Ramaswamy, Albrecht Mayer, Thomas Wild, Andreas Herkersdorf: A Rule-based Methodology for Hardware Configuration Validation in Embedded Systems. 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2016), 2016 mehr… BibTeX
  • Michael Vonbun, Thomas Wild, Andreas Herkersdorf: Estimation of End-to-End Packet Error Rates for NoC Multicasts. Architecture of Computing Systems -- ARCS 2016, Springer International Publishing, 201629th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings mehr… BibTeX Volltext ( DOI )
  • Philipp Wagner, Lin Li, Thomas Wild, Albrecht Mayer, Andreas Herkersdorf: What happens on an MPSoC stays on an MPSoC - unfortunately! 2016 International Symposium on Integrated Circuits (ISIC), 2016 mehr… BibTeX Volltext ( DOI )
  • Philipp Wagner, Thomas Wild, Andreas Herkersdorf: DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip. Architecture of Computing Systems -- ARCS 2016 (Springer Lecture Notes 9637), Springer International Publishing, 2016, 197-209 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM)
  • Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf: TCU: A Multi-Objective Hardware Thread Mapping Unit for HPC Clusters. International Supercomputing Conference High Performance -- ISC 2016, 2016 mehr… BibTeX
  • Santiago Pagani, Lars Bauer, Qingqing Chen, Elisabeth Glocker, Frank Hannig, Andreas Herkersdorf, Heba Khdr, Anuj Pathania, Ulf Schlichtmann, Doris Schmitt-Landsiedel, Mark Sagi, Éricles Sousa, Philipp Wagner, Volker Wenzel, Thomas Wild, Jörg Henkel: Dark silicon management: an integrated and coordinated cross-layer approach. it - Information Technology 58 (6), 2016, 297–307 mehr… BibTeX Volltext ( DOI )
  • Shiva Shankar Subramanian, Pinxing Lin, Andreas Herkersdorf, Thomas Wild: Hardware Acceleration of Signature Matching through Multi­ Layer Transition Bit Masking. ITNAC 2016, International Telecommunication Networks and Applications Conference, 2016, 226-233 mehr… BibTeX
  • Stefan Rösch, Holm Rauchfuss, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf: MPSoC application resilience by hardware-assisted communication virtualization. Microelectronics Reliability, 2016 mehr… BibTeX Volltext ( DOI )

2015

  • Andre Richter, Christian Herber, Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf: A Hardware/Software Approach for Mitigating Performance Interference Effects in Virtualized Environments Using SR-IOV. Cloud Computing (CLOUD), 2015 IEEE 8th International Conference on, 2015 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM)
  • Andre Richter, Christian Herber, Thomas Wild, Andreas Herkersdorf: Denial-of-Service attacks on PCI passthrough devices: Demonstrating the impact on network- and storage-I/O performance. Journal of Systems Architecture 61 (10), 2015, 592 - 599 mehr… BibTeX Volltext ( DOI )
  • Andreas Weichslgartner, Jan Heisswolf, Aurang Zaib, Thomas Wild, Andreas Herkersdorf, Jürgen Becker and Jürgen Teich: Position Paper: Towards Hardware-Assisted Decentralized Mapping of Applications for Heterogeneous NoC Architectures. Second International Workshop on Multi-objective Many-core design (MOMAC), 2015 mehr… BibTeX
  • Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf: Network Interface with Task Spawning Support for NoC-Based DSM Architectures. Architecture of Computing Systems--ARCS 2015, 2015 mehr… BibTeX
  • Christian Herber, Andre Richter, Thomas Wild, Andreas Herkersdorf: Real-Time Capable CAN to AVB Ethernet Gateway Using Frame Aggregation and Scheduling. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 mehr… BibTeX Volltext (mediaTUM)
  • Lars Bauer, Jörg Henkel, Andreas Herkersdorf, Michael A. Kochte, Johannes M. Kühn, Wolfgang Rosenstiel, Thomas Schweitzer, Stefan Wallentowitz, Volker Wenzel, Thomas Wild, Hans-Joachim Wunderlich, Hongyan Zhang: Adaptive multi-layer techniques for increased system dependability. it - Information Technology 57 (3), 2015 mehr… BibTeX Volltext ( DOI )
  • Philipp Wagner, Lin Li, Thomas Wild, Albrecht Mayer, Andreas Herkersdorf: Knowledge-Based On-Chip Diagnosis for Multi-Core Systems-on-Chip. edaWorkshop 15, 2015, 39-45 mehr… BibTeX Volltext (mediaTUM)
  • Preethi Parayil Mana Damodaran, Aurang Zaib, Thomas Wild, Stefan Wallentowitz, Andreas Herkersdorf: Sharer Status-based Caching in tiled Multiprocessor Systems-on-Chip. HPC 2015, 2015 mehr… BibTeX
  • Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf: A Hardware-based Multi-objective Thread Mapper for Tiled Manycore Architectures. 33rd IEEE International Conference on Computer Design (ICCD), 2015 mehr… BibTeX Volltext ( DOI )

2014

  • Andre Richter, Christian Herber, Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf: Performance Isolation Exposure in Virtualized Platforms with PCI Passthrough I/O Sharing. ARCS - Architecture of Computing Systems, 2014 mehr… BibTeX Volltext (mediaTUM)
  • Andy Heinig, Manfred Dietrich, Andreas Herkersdorf, Felix Miller, Thomas Wild, Kai Hahn, Armin Grünewald, Rainer Brück, Steffen Krohnert, Jochen Reisinger: System Integration - The Bridge between More than Moore and More Moore Design. Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration, 2014 mehr… BibTeX
  • Aurang Zaib, Prashanth Raju, Thomas Wild, Andreas Herkersdorf: A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs. Resource awareness and adaptivity in multi-core computing, RACING, First Workshop, 2014 mehr… BibTeX
  • Christian Herber, Andre Richter, Thomas Wild, Andreas Herkersdorf: A Network Virtualization Approach for Performance Isolation in Controller Area Network (CAN). The 20th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2014 mehr… BibTeX Volltext (mediaTUM)
  • Christian Herber, Andre Richter, Thomas Wild, Andreas Herkersdorf: Deadline-Aware Interrupt Coalescing in Controller Area Network (CAN). The 11th IEEE International Conference on Embedded Software and Systems, 2014 mehr… BibTeX Volltext ( DOI ) Volltext (mediaTUM)
  • Felix Miller, Vladimir Todorov, Thomas Wild, Daniel Müller-Gritschneder, Andreas Herkersdorf, Ulf Schlichtmann: A TSV-Property-aware Synthesis Method for Application-Specific 3D-NoCs Design. Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration, 2014 mehr… BibTeX
  • Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Martin Karle, Maximilian Singh, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker: The Invasive Network on Chip - A Multi-Objective Many-Core Communication Infrastructure. Proceedings of the first International Workshop on Multi-Objective Many-Core Design (MOMAC) in conjunction with International Conference on Architecture of Computing Systems (ARCS), 2014 mehr… BibTeX
  • Stefan Wallentowitz, Michael Tempelmeier, Thomas Wild, Andreas Herkersdorf: Network-on-Chip Protection Switching Techniques for Dependable Task Migration on an Open Source MPSoC Platform. edaWorkshop, 2014 mehr… BibTeX
  • Stefan Wallentowitz, Volker Wenzel, Stefan Rösch, Thomas Wild, Andreas Herkersdorf, Jörg Henkel: Dependable Task and Communication Migration in Tiled Manycore System-on-Chip. Forum on Specification & Design Languages (FDL), 2014 mehr… BibTeX

2013

  • Andreas Herkersdorf, Johny Paul, Ravi Kumar Pujari, Walter Stechele, Stefan Wallentowitz, Thomas Wild, Aurang Zaib: Potentials and Challenges for Multi-Core Processors in Robotic Applications. Workshop "Roboterkontrollarchitekturen" auf der Informatik 2013, 43. Jahrestagung der Gesellschaft für Informatik, GI-Edition "Lecture Notes in Informatics" (LNI), 2013 mehr… BibTeX
  • Aurang Zaib, Jan Heisswolf, Andreas Weichslgartner, Thomas Wild, Jürgen Teich, Jürgen Becker, Andreas Herkersdorf: AUTO-GS: Self-optimization of NoC Traffic Through Hardware Managed Virtual Connections. 16th EUROMICRO Digital System Design (DSD) Conference, 2013 mehr… BibTeX
  • Felix Miller, Thomas Wild, Andreas Herkersdorf: Networks-On-Chips für 3D-ICs. 7. ITG/GI/GMM-Fachtagung, 2013 mehr… BibTeX
  • Felix Miller, Thomas Wild, Andreas Herkersdorf: Virtualized and Fault-Tolerant Inter-Layer-Links for 3D-ICs. Microprocessors and Microsystems Volume 37 (Issue 8), 2013, pp 823-835 mehr… BibTeX
  • J. Heisswolf, A. Zaib, A. Weichslgartner, R. König, T. Wild, A. Herkersdorf, J. Teich and J. Becker: Virtual Networks - Distributed Communication Resource Management. In: Transactions on Reconfigurable Technology and Systems (TRETS). ACM, 2013 mehr… BibTeX
  • Jan Heisswolf, Andreas Weichslgartner, Aurang Zaib, Ralf König, Thomas Wild, Andreas Herkersdorf, Jürgen Teich, Jürgen Becker: Hardware Supported Adaptive Data Collection for Networks on Chip. IPDPS PhD Forum - 27th IEEE International Symposium on Parallel & Distributed Processing, 2013 mehr… BibTeX
  • Stefan Wallentowitz, Philipp Wagner, Michael Tempelmeier, Thomas Wild, Andreas Herkersdorf: Open Tiled Manycore System-on-Chip. Lehrstuhl für Integrierte Systeme, 2013, mehr… BibTeX
  • Stefan Wallentowitz, Thomas Wild, Andreas Herkersdorf: HW-OSQM: Reducing the Impact of Event Signaling by Hardware-based Operating System Queue Manipulation. International Conference on Architecture of Computing Systems (ARCS), Springer, 2013, 280-291 mehr… BibTeX

2012

  • Andreas Herkersdorf, Hans-Ulrich Michel, Holm Rauchfuss, Thomas Wild: Multicore Enablement for Automotive Cyber Physical Systems. Special issue of journal "it - Information Technology", 2012 mehr… BibTeX
  • Andreas Lankes, Thomas Wild, Stefan Wallentowitz, Andreas Herkersdorf: Benefits of Selective Packet Discard in Networks-on-Chip. Architecture and Code Optimization (TACO) Volume 9 (Issue 2), 2012, p. 1-21 mehr… BibTeX
  • Felix Miller, Thomas Wild, Andreas Herkersdorf: TSV-Virtualization for Multi-Protocol-Interconnect in 3D-ICs. 15th EUROMICRO Conference on Digital System Design (DSD), 2012 mehr… BibTeX
  • Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf: Enhanced Reliability in Tiled Manycore Architectures through Transparent Task Relocation. 7th Workshop Dependability and Fault Tolerance (VERFE), presented at ARCS, 2012 mehr… BibTeX
  • Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf Koenig, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker: Hardware-assisted Decentralized Resource Management for Networks on Chip with QoS. IEEE International Symposium on Parallel and Distributed Processing Workshops and PhD Forum (IPDPSW), 2012 mehr… BibTeX
  • Jörg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, Sebastian Kobbe: Invasive Manycore Architectures. Proceedings of the 17th Asia and South Pacific Design Automation Conference (ASP-DAC), 2012 mehr… BibTeX
  • Kai Hylla, Armin Grünewald, Kai Hahn, Andy Heinig, Uwe Knöchel, S. Wolf, Felix Miller, Thomas Wild, Artur Quiring, Markus Olbrich, Sebastian Sattler, Dieter Treytnar: NEEDS - Nanoelektronik-Entwurf für 3D-Systeme. Zuverlässigkeit und Entwurf, 6. GMM/GI/ITG-Fachtagung (ZuE) , 2012 mehr… BibTeX
  • Michael Gerndt, Frank Hannig, Andreas Herkersdorf, Andreas Hollmann, Marcel Meyer, Sascha Roloff, Josef Weidendorfer, Thomas Wild, Aurang Zaib: An Integrated Simulation Framework for Invasive Computing. Forum on specification and Design Languages (FDL), 2012 mehr… BibTeX
  • Roman Plyaskin, Thomas Wild, Andreas Herkersdorf: System-level Software Performance Simulation Considering Out-of-order Processor Execution. International Symposium on System-on-Chip, 2012 mehr… BibTeX
  • Stefan Wallentowitz, Andreas Lankes, Aurang Zaib, Thomas Wild, Andreas Herkersdorf: A Framework for Open Tiled Manycore System-on-Chip. 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012 mehr… BibTeX

2011

  • Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf, Benjamin Vogel, Jörg Henkel: Hardware Assisted Thread Assignment for RISC based MPSoCs in Invasive Computing. International Symposium on Integrated Circuits (ISIC), 2011 mehr… BibTeX
  • Stefan Wallentowitz, Marcel Meyer, Thomas Wild, Andreas Herkersdorf: Accelerating Collective Communication in Message Passing on Manycore System-on-Chip. International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XI), 2011 mehr… BibTeX

2010

  • Andreas Herkersdorf, Andreas Lankes, Michael Meitinger, Rainer Ohlendorf, Stefan Wallentowitz, Thomas Wild, Johannes Zeppenfeld: Hardware Support to Exploit Parallelism in Homogeneous and Heterogeneous Multi-Core Systems on Chip. Springer Verlag, 2010 mehr… BibTeX
  • Andreas Lankes, Thomas Wild, Sören Sonntag, Helmut Reinig, Andreas Herkersdorf: Comparison of Deadlock Recovery and Avoidance Mechanisms to approach Message dependent Deadlocks in on-chip Networks. The 4th ACM/IEEE International Symposium on Networks-on-Chip, 2010 mehr… BibTeX
  • Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf: A Network Interface Card Architecture for I/O Virtualization in Embedded Systems. Second Workshop on I/O Virtualization (WIOV), 2010 mehr… BibTeX
  • Kimon Karras, Thomas Wild, Andreas Herkersdorf: A Folded Pipeline Network Processor Architecture for 100 Gbit/s Networks. ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS), 2010 mehr… BibTeX
  • Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: An Application-aware Load Balancing Strategy for Network Processors. International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC), 2010 mehr… BibTeX

2009

  • Andreas Lankes, Thomas Wild, Andreas Herkersdorf: Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources. Euromicro Conference on Digital System Design (DSD), 2009 mehr… BibTeX
  • Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf: Advanced Packet Segmentation and Buffering Algorithms in Network Processors. 4th International Conference on High Performance and Embedded Architectures and Compilers, 2009 mehr… BibTeX
  • Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: FlexPath NP- Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. In: Dynamically Reconfigurable Systems, Architectures, Design, Methods and Applications. Springer, 2009 mehr… BibTeX
  • Simon Hauger, Thomas Wild, Arthur Mutter, Andreas Kirstädter, Kimon Karras, Rainer Ohlendorf, Frank Feller, Joachim Scharf: Packet Processing at 100Gbps and Beyond - Challenges and Perspectives. 10. ITG-Fachtagung Photonische Netze, 2009 mehr… BibTeX

2008

  • Andreas Lankes, Thomas Wild, Johannes Zeppenfeld: System Level Simulation of Autonomic SoCs with TAPES. Architecture of Computing Systems (ARCS) (Lecture Notes in Computer Science 4934), Springer, 2008, 9-22 mehr… BibTeX Volltext ( DOI )
  • Daniel Llorente, Kimom Karras, Thomas Wild, Andreas Herkersdorf: Buffer Allocation for Advanced Packet Segmentation in Network Processors. Application-Specific Systems, Architectures and Processors (ASAP), IEEE Press, 2008, 221-226 mehr… BibTeX Volltext ( DOI )
  • Kimon Karras, Daniel Llorente, Thomas Wild, Andreas Herkersdorf: Improving Memory Subsystem Performance in Network Processors with Smart Packet Segmentation. Embedded Computer Systems: Architectures, Modeling, and Simulation, 20088th International Workshop, SAMOS mehr… BibTeX
  • Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Hardware Packet Resequencer Unit for Network Processors. Architecture of Computing Systems (ARCS) (Lecture Notes in Computer Science 4934), Springer, 2008, 85-97 mehr… BibTeX Volltext ( DOI )
  • Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: FlexPath NP - A Network Processor Architecture with Flexible Processing Paths. International Symposium on System-on-Chip (SoC), 2008 mehr… BibTeX
  • Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Transactions on VLSI Systems, IEEE, 2008, 1335-1345 mehr… BibTeX
  • Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: SPP1148 Booth: Network Processors. Field Programmable Logic and Applications (FPL), 2008, 352-352 mehr… BibTeX
  • Zhonglei Wang, Thomas Wild, Stefan Rüping, Bernhard Lippmann: Benchmarking Domain Specific Processors: A Case Study of Evaluating A Smart Card Processor Design. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), IEEE Press, 2008, 16-21 mehr… BibTeX Volltext ( DOI )

2007

  • Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild: Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dagstuhl Seminar on Dynamically Reconfigurable Architectures, 2007 mehr… BibTeX
  • Andreas Lankes, Thomas Wild, Johannes Zeppenfeld: Power Estimation of Time Variant SoCs with TAPES. 10th EUROMICRO Conference on Digital System Design: Architectures, Methods, Tools (DSD 07), 2007 mehr… BibTeX
  • Daniel Llorente, Kimon Karras, Michael Meitinger, Holm Rauchfuss, Thomas Wild, Andreas Herkersdorf: Accelerating Packet Buffering and Administration in Network Processors. International Symposium on Integrated Circuits (ISIC), 2007 mehr… BibTeX
  • Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. IEEE Computer Society Annual Symposium on VLSI, 2007 (ISVLSI '07), 2007 mehr… BibTeX
  • Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: A Packet Classification Technique for On-Chip Processing Path Selection. Proceedings of the 5th Workshop on Application Specific Processors (WASP'07), 2007, pp 95-102 mehr… BibTeX
  • Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Simulated and Measured Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. Journal of Systems Architecture Volume 53 (Issue 10), 2007, pp 703-718 mehr… BibTeX Volltext ( DOI )

2006

  • Jürgen Foag, Thomas Wild: Queuing algorithm for speculative Network Processors. International Journal of High Performance Computing and Networking Volume 4 (Issue 5/6), 2006, pp 241-247 mehr… BibTeX
  • Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2006), 2006 mehr… BibTeX
  • Thomas Wild, Andreas Herkersdorf, Gyoo-Yeong Lee: TAPES - Trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems Volume 10 (Numbers 2-3, Special Issue on SystemC-based System Modeling, Verification and Synthesis), 2006, pp 157-179 mehr… BibTeX
  • Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf: Performance Evaluation for System-on-Chip Architectures using Trace-based Transaction Level Simulation. Design Automation & Test in Europe (DATE), 2006 mehr… BibTeX

2005

  • Jürgen Foag, Thomas Wild: Predictive Processing Architecture Extension for Network Processora. IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2005 mehr… BibTeX
  • Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild: FlexPath NP - A Network Processor Concept with Application-Driven Flexible Processing Paths. CODES+ISSS, 2005 mehr… BibTeX

2004

  • Jürgen Foag, Thomas Wild: Queuing algorithm for Speculative Network Processors. 18th International Symposium on High Performance Computing Systems and Applications, 2004 mehr… BibTeX

2003

  • Jürgen Foag, Thomas Wild: Traffic Prediction Algorithm for a Speculative Network Processor. 17th Intl. Symposium for High Performance Computing Systems and Applications HPCS, 2003 mehr… BibTeX
  • Winthir Brunnbauer, Thomas Wild, Andreas Krug: Consideration of IP-Modules during Mapping and Scheduling of Task Graphs. Austrochip, 2003 mehr… BibTeX
  • Winthir Brunnbauer, Thomas Wild, Jürgen Foag, Nuria Pazos: A Constructive Algorithm with Look-Ahead for Mapping and Scheduling of Task Graphs with Conditional Edges. EuroMicro Symposium on Digital System Design (DSD), 2003 mehr… BibTeX